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Languguage OS II Version 10-94 (Knowledge Media)(1994).ISO
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68HC11.002
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1989-04-18
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Q. Can I develop a 68HC11A2 application with the EVB board?
A: Yes, although it will take some initial effort because the
'811A2 and EVB were not designed with each other in mind. The
first problem you will encounter is that the '811A2 normally
comes with the internal EEPROM enabled (EERON bit erased to
logic one) and mapped at $F800->$FFFF (CONFIG erased to $FF).
This causes the empty EEPROM to conflict with the BUFFALO
monitor. If you have access to an EVM board, you can easily
reprogram CONFIG to move the EEPROM out of the way of EVB
areas (preferably put it at $2,$3,$A,or $B pages) or disable
it. If you don't have an EVM, it is harder but still can be
done. Bootstrap mode requires very few connections and BUFFALO
has an undocumented command (XBOOT - see BUFFALO 2.5 listing
page B-89 of the EVB manual) which simplifies boot loading a
short program to the '811A2 to be reprogrammed. Another
approach involves reassembling BUFFALO to reside at $A000->
$BFFF and jumpering the EVB board to come up in special test
mode with the new BUFFALO PROM in the extra socket which is
jumpered to be mapped at $A000->$BFFF. In special test mode,
the '811A2 EEPROM is initially disabled so theere are no
conflicts and memory modify can be used to reprogram CONFIG.
NOTE: This is a very superficial discussion of this procedure
and an AP-NOTE will probaply be required for all but the most
knowledgeable users.
A second problem with using the '811A2 in an EVM is that the
memory modify etc. commands only expect EEPROM in the address
space $103F and $B600->$B7FF so these commands will work on
CONFIG but not on the 2k EEPROM in the '811A2. To solve this
problem, you could either write your own routines to control
programming and erase operations or you could look through the
BUFFALO listing and modify the address ranges for the BUFFALO
EEPROM modification commands. In BUFFALO 2.5, there are three
places the address range needs to be changed (MM, MOVE, and ERASE
commands).
Q. I've tried everything and I cannot make the SPI do anything. What
am I doing wrong?
A: You probably forgot to set the port D data direction register.
SPI output are high impedence unless the corresponding DDRD bit
is set to 1, indicating it is an output.
Q. What makes my program hang after I get the first interrupt?
A: Former Intel architecture users don't usually realize that
specific software actions are required to clear interrupt flags
in Motorola style architectures. The first interrupt encountered
is serviced normally but the user forgets to clear the flag which
caused the interrupt. When the RTI executed, the interrupt is
still pending so it is serviced again immediately. The program
appears to hang.
Q. I have an external RAM which doesn't appear to work. Sometines
wrong data is written and I always get lost if I try to return
from a subroutine or an interrupt.
A: You probably forget to include E in the development of the write
enable signal for your external RAM. In multiple byte write cases
such as store D, store X, JSR, or interrupt stacking, the R/W pin
remains low continuously for all of the consecutive cycles. The RAM
you are using probably requires a rising edge on the write signal
to actually do the write operation. Thus, only the last byte in the
series is actually written. Lots of things will appear to work
normally but double byte writes, subroutine calls and interrupts
will fail.